(1) Field of the invention
The present invention generally relates to a semiconductor device and a method for manufacturing such, and more particularly to a micro-semiconductor device and a method for manufacturing such.
(2) Description of the Prior Art
In recent years, to miniaturize electronic equipment it is desired that micro-semiconductor devices which can be mounted on a narrow area have been developed. .mu.BGA (Ball Grid Array) semiconductor devices and CSP (Chip Size Package) semiconductor devices are examples of such micro-semiconductor device.
FIG. 1 shows an example of a conventional micro-semiconductor device 10.
The micro-semiconductor device 10 shown in FIG. 1 is referred to as a .mu.BGA semiconductor device. Referring to FIG. 1, the micro-semiconductor device has a LSI chip 11, a terminal member 12, a square protection frame 13 and an adhesive layer 14. The terminal member 12 has a structure in which a Cu-foil lead 15 is adhered to a polyimide film 16 provided with solder bumps 17. The diameter d.sub.1 of each of the solder bumps 17 is about 0.2 mm. The terminal member 12 is adhered to the LSI chip 11 by the adhesive layer 14. The adhesive layer 14 also has function of encapsulating a circuit portion of the LSI chip 11. The protection frame 13 surrounds the LSI chip 11 so as to protect it.
The solder bumps 17 and pads 21 on a printed circuit board 20 are soldered by reflow so that the micro-semiconductor device 10 is mounted on the printed circuit board 20. The area on which the micro-semiconductor device is mounted is substantially equal to a projected area of the LSI chip 11.
The terminal member 12 described above has a structure in which the Cu-foil 15 formed as an internal terminal and the solder bumps 17 formed as external terminals are integrated with each other. The terminal member 12 is manufactured in accordance with steps as shown in FIG. 3 (A), (B) and (C).
First, a Cu-foil 31 is formed on the polyimide film 16 through which holes 30 are formed, as shown in FIG. 3 (A). Second, the Cu-foil 31 is masked and etched so that fine Cu-foil leads 15 are formed as shown in FIG. 3 (B). As a result, an internal terminal member 32 in which the fine Cu-foil leads 15 are stuck on the polyimide film 16 having the holes is obtained.
Last, the internal terminal member 32 is masked and plated with solder so that the solder is connected to the Cu-foil leads 15. The holes formed through the polyimide film 16 are filled with the solder so that the solder projects above the rims of the holes. As a result, the solder bumps 17 are formed.
The conventional micro-semiconductor device as has been described above has the following two disadvantages.
First, the conventional micro-semiconductor device is apt to be defectively mounted on the printed circuit board.
The LSI chip 11 is made of silicon, the coefficient of thermal expansion being 3.5.times.10.sup.-6. On the other hand, the printed circuit board 20 is made of glass epoxy resin having a coefficient of thermal expansion of 14.times.10.sup.-6 which is four times as large as that of the LSI chip 11. The diameter d.sub.1 of each of the solder bumps 17 is about 0.2 mm which is only one third as large as that of a solder bump of a general BGA semiconductor device, so that each of the solder bumps 17 has limited ability for absorbing stress.
Thus, when there is stress caused by the difference between the coefficients of thermal expansion of the LSI chip 11 and the printed circuit board 20, the stress may be too large to be absorbed by the solder bumps 17. In this case, cracks may be generated in the solder bumps 17, so that the micro-semiconductor device may be defectively mounted on the printed circuit board.
Even if the cracks are not generated in the solder bumps 17, the reliability of the micro-semiconductor device mounted on the printed circuit board 20 is poor.
Second, the production cost of the micro-semiconductor device made in the above manner is high.
The terminal member 12 has the structure in which the Cu-foil leads 15 and the solder bumps 17 are integrated with each other. It is relatively difficult to form the fine Cu-foil leads 15 and the small solder bump 17. Thus, the terminal member 12 is apt to be defectively formed. Further, the yield in the etching step shown in FIG. 3 (B) and the yield in the solder plating step shown in FIG. 3 (C) are poor. The total yield of the terminal member 12 which is obtained by multiplying both the above yields in the etching step and the solder plating step is consequently poor.
As a result, the production cost of the terminal member 12 is high, and the total production cost of the micro-semiconductor device is high.